1. Field of the Invention
This invention relates to framing synchronization in digital transmission systems and, in particular, to a novel technique of frame search control which allows a comparison of up to n bits on the occurrence of each framing clock pulse while an out-of-frame condition exists, and stores the next n sequential bits for subsequent comparison. Thus a fast reframe time is obtained with a minimum of circuit elements.
2. Description of the Prior Art
In some systems, which have addressed the problem of reframing upon loss of synchronization, the framing clock can be inhibited for one bit interval. A frame generator is also employed which provides the 10 or 01 alternating binary conditions associated with a winking frame signal. In certain systems a preview circuit is used. The preview circuit stores, during an out-of-frame condition, the bit immediately following that in the current framing interval. The preview bit is used during cycles where the frame clock is inhibited to preset the framing generator states so that a correct framing indication will be anticipated in the next framing bit interval. Circuitry is included to inhibit the framing clock one bit interval for each frame in which an error in the frame pattern is detected and to insure that in these cases the state of the framing generator is set in accordance with the state of the preview bit.
A framing system which employs an eight bit store and a frame control is described in U.S. Pat. No. 3,742,139, entitled "Framing System for T-Carrier Telephony", inventor M. A. Baehly. A group of eight bits are arbitrarily selected in a first frame and are fed to the store and compared with the corresponding time slots two frames later. Thus, the eight bits of the first frame are compared with the bits in the same time slot of the third frame, the third frame with the fifth, the fifth with the seventh and the seventh with the ninth, in each case with corresponding time slots. If framing is not achieved after the comparison between the seventh and ninth frames, the frame control circuit 18 operates to delay the opening of the store 16 by eight time slots, and another series of comparisons is carried out, this time directed to the series of eight time slots immediately following the eight time slots in the first comparison. The process is repeated until framing is achieved.
Disadvantages of the prior art system are the circuit complexity and the necessity to wait through four comparisons before the frame shifting is initiated. These as well as other disadvantages have been overcome as will be evident when the operation of subject framing search control is understood.